About

This workshop will discuss the connection between logic and circuits. Topics of interests include logic-guided circuit construction, lower/upper bounds, as well as problems related to (approximate) model counting.

Chairs/Organizers
Invited Participants

Antoine Amarilli (Telecom Paris), Alessandro Antonucci (IDSIA), Marcelo Arenas (PUC Chile and RelationalAI), Florent Capelli (Université d'Artois, CNRS, CRIL), Yoo Jung Choi (Arizona State University), Cassio de Campos (TU Eindhoven), Alexis de Colnet (TU Wien), Rina Dechter (UC Irvine), Denis Deratani Mauá (University of Sao Paulo), Weiming Feng (UC Berkeley), Markus Hecher (MIT), Brendan Juba (Washington University in St. Louis), Ahmet Kara (University of Zurich), Ondrej Kuzelka (Prague University), Marta Kwiatkowska (University of Oxford), Kuldeep Singh Meel (National University of Singapore), Mikaël Monet (INRIA), Sriraam Natarajan (UT Dallas), Robert Peharz (TU Graz), Ely Porat (Bar-Ilan University), Feras Saad (Carnegie Mellon University), Scott Sanner (University of Toronto), Andy Shih (Stanford University), Dan Suciu (University of Washington), Eugenia Ternovska (Simon Fraser University), Martin Trapp (Aalto University), Timothy Van Bremen (National University of Singapore), Antonio Vergari (University of Edinburgh), Benjie Wang (University of Oxford), Zhe Zeng (UCLA), Honghua Zhang (UCLA)